As an LSI or a 3D memory is microfabricated and multilayered, an increase in wiring delay is becoming a large problem in metal wiring. It is important to reduce wiring resistance or a capacity between wires in order to reduce the wiring delay. For example, an application of a low-resistance material such as Cu is practically used in order to reduce resistance of the wiring. However, even in the Cu wiring, there are such problems as reliability degradation due to stress migration or electromigration, an increase in electric resistivity caused by a size effect, and embedding into fine via holes. A wiring material having low resistance and excellent current density resistance is demanded.
As a next-generation wiring material which can be expected to have low resistance and high reliability, application of a carbon-based material such as a carbon nanotube or a graphene is attracting attention. The carbon-based material has excellent physical properties such as high current density resistance, electric conductive characteristics, thermal conductivity, and mechanical strength. Particularly, a wiring structure using a graphene in horizontal interlayer wiring is studied. In order to form graphene wiring, a graphene film uniformly formed on a substrate is processed into a wiring shape, or graphene is grown on a catalyst layer formed into a wiring shape. However, when the graphene wiring is as thin as about 10 nm, resistance may increase due to becoming a semiconductor by a quantum confinement effect of an electron or a scattering effect by an edge.
A promising method for reducing the resistance is an intercalation method. In the intercalation method, an interlayer substance is inserted between graphene sheets, and is converted into a graphene interlayer compound. The inserted interlayer substance donates an electron or a hole to the graphene to reduce the resistance. However, the interlayer substance after being subjected to an intercalation treatment may be leaked.